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1/13 april 2004 high speed: f max =55mhz (typ.) at v cc =6v low power dissipation: i cc =4 a(max.) at t a =25c high noise immunity: v nih =v nil = 28% v cc (min.) symmetrical output impedance: |i oh |=i ol =4ma(min) balanced propagation delays: t plh ? t phl wide operating voltage range: v cc (opr) = 2v to 6v pin and function compatible with 54 series 193 space grade-1: esa scc qualified 50 krad qualified, 100 krad available on request no sel under high let heavy ions irradiation device fully compliant with scc-9204-065 description the m54hc193 is an high speed cmos syncronous up/down binary counters fabricated with silicon gate c 2 mos technology. the counter has two separate clock inputs, an up count input and a down count input. all outputs of the flip-flop are simultaneously triggered on the low to high transition of either clock while the other input is held high. the direction of counting is determined by which input is clocked. this counter may be preset by entering the desired data on the data a, data b, data c, and data d input. when the load input is taken low the data is loaded independently of either clock input. this feature allows the counters to be used as divide-by-n counters by modifying the count length with the preset inputs. in addition the counter can also be cleared. this is accomplished by inputting a high on the clear input. all 4 internal stages are set to low independently of either count input. both a borrow and carry output are provided to enable cascading of both up and down counting functions. the borrow output produces a negative going pulse when the counter underflows and the carry outputs a pulse when the counters overflows. the counter can be cascaded by connection the carry and borrow outputs of one device to the count up and count down inputs, respectively, of the next device. all inputs are equipped with protection circuits against static discharge and transient excess voltage. m54hc193 rad-hard synchronous up/down binary counter pin connection order codes package fm em dilc m54hc193d m54hc193d1 fpc M54HC193K M54HC193K1 dilc-16 fpc-16
m54hc193 2/13 iec logic symbols input and output equivalent circuit pin description truth table x : don?t care pin n symbol name and function 3, 2, 6, 7 qa to qd flip-flop outputs 4 ccd count down clock input 5 ccu count up clock input 11 lo ad asynchronous parallel load input (active low) 12 carry count up (carry) output (active low) 13 borrow count down (borrow) output (active low) 14 clr asynchronous reset input (active high) 15, 1, 10, 9 a to d data inputs 8 gnd ground (0v) 16 v cc positive supply voltage count up count down load clear function hhl countup hhl nocount hhlcountdown hhlnocount x x l l preset x x x h reset
m54hc193 3/13 logic diagram this logic diagram has not be used to estimate propagation delays
m54hc193 4/13 timing chart absolute maximum ratings absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these conditions is not implied recommended operating conditions symbol parameter value unit v cc supply voltage -0.5 to +7 v v i dc input voltage -0.5 to v cc +0.5 v v o dc output voltage -0.5 to v cc +0.5 v i ik dc input diode current 20 ma i ok dc output diode current 20 ma i o dc output current 25 ma i cc or i gnd dc v cc or ground current 50 ma p d power dissipation 300 mw t stg storage temperature -65 to +150 c t l lead temperature (10 sec) 265 c symbol parameter value unit v cc supply voltage 2to6 v v i input voltage 0 to v cc v v o output voltage 0 to v cc v t op operating temperature -55 to 125 c t r ,t f input rise and fall time v cc =2.0v 0 to 1000 ns v cc =4.5v 0 to 500 ns v cc =6.0v 0 to 400 ns
m54hc193 5/13 dc specifications symbol parameter test condition value unit v cc (v) t a = 25c -40 to 85c -55 to 125c min. typ. max. min. max. min. max. v ih high level input voltage 2.0 1.5 1.5 1.5 v 4.5 3.15 3.15 3.15 6.0 4.2 4.2 4.2 v il low level input voltage 2.0 0.5 0.5 0.5 v 4.5 1.35 1.35 1.35 6.0 1.8 1.8 1.8 v oh high level output voltage 2.0 i o =-20 a 1.9 2.0 1.9 1.9 v 4.5 i o =-20 a 4.4 4.5 4.4 4.4 6.0 i o =-20 a 5.9 6.0 5.9 5.9 4.5 i o =-4.0 ma 4.18 4.31 4.13 4.10 6.0 i o =-5.2 ma 5.68 5.8 5.63 5.60 v ol low level output voltage 2.0 i o =20 a 0.0 0.1 0.1 0.1 v 4.5 i o =20 a 0.0 0.1 0.1 0.1 6.0 i o =20 a 0.0 0.1 0.1 0.1 4.5 i o =4.0 ma 0.17 0.26 0.33 0.40 6.0 i o =5.2 ma 0.18 0.26 0.33 0.40 i i input leakage current 6.0 v i =v cc or gnd 0.1 1 1 a i cc quiescent supply current 6.0 v i =v cc or gnd 44080 a
m54hc193 6/13 ac electrical characteristics (c l = 50 pf, input t r =t f =6ns) symbol parameter test condition value unit v cc (v) t a = 25c -40 to 85c -55 to 125c min. typ. max. min. max. min. max. t tlh t thl output transition time 2.0 30 75 95 110 ns 4.5 8 15 19 22 6.0 7 13 16 19 t plh t phl propagation delay time (count up, down - q) 2.0 65 190 240 285 ns 4.5 20 38 48 57 6.0 16 32 41 48 t plh t phl propagation delay time (count up - carry ) 2.0 40 130 165 195 ns 4.5 13 26 33 39 6.0 11 22 28 33 t plh t phl propagation delay time (count down - borrow ) 2.0 40 130 165 195 ns 4.5 13 26 33 39 6.0 11 22 28 33 t plh t phl propagation delay time (load -q) 2.0 85 220 275 330 ns 4.5 25 44 55 66 6.0 20 37 47 56 t plh t phl propagation delay time (load - carry ) 2.0 110 250 315 375 ns 4.5 30 50 63 75 6.0 25 43 54 64 t plh t phl propagation delay time (load - borrow ) 2.0 110 250 315 375 ns 4.5 31 50 63 75 6.0 25 43 54 64 t plh t phl propagation delay time (data - q) 2.0 80 190 240 285 ns 4.5 25 38 48 57 6.0 20 32 41 48 t plh t phl propagation delay time (data - carry ) 2.0 120 250 315 375 ns 4.5 34 50 63 75 6.0 28 43 54 64 t plh t phl propagation delay time (data - borrow ) 2.0 110 250 315 375 ns 4.5 30 50 63 75 6.0 25 43 54 64 t phl propagation delay time (clear -q) 2.0 100 225 280 340 ns 4.5 30 45 56 68 6.0 25 38 48 58 t plh propagation delay time (clear -carry ) 2.0 120 250 315 375 ns 4.5 35 50 63 75 6.0 29 43 54 64 t phl propagation delay time (clear - borrow ) 2.0 120 250 315 375 ns 4.5 35 50 63 75 6.0 29 43 54 64 f max maximum clock frequency 2.0 5 12 4 3.4 mhz 4.5 25482017 6.0 30552420 t w(h) t w(l) minimum pulse width (count up/ down) 2.0 34 100 125 150 ns 4.5 9 20 25 30 6.0 7 17 21 26
m54hc193 7/13 capacitive characteristics 1) c pd is defined as the value of the ic?s internal equivalent capacitance which is calculated from the operating current consumption without load. (refer to test circuit). average operating current can be obtained by the following equation. i cc(opr) =c pd xv cc xf in +i cc t w(l) minimum pulse width (load ) 2.0 34 75 95 110 ns 4.5 9 15 19 22 6.0 7 13 16 19 t w(h) minimum pulse width (clear) 2.0 40 100 125 150 ns 4.5 12 20 25 30 6.0 10 17 21 26 t s minimum set-up time (data -load ) 2.0 30 75 95 110 ns 4.5 9 15 19 22 6.0 7 13 16 19 t h minimum hold time 2.0 0 0 0 ns 4.5 0 0 0 6.0 0 0 0 t rem minimum removal time (load ) 2.0 6 50 65 75 ns 4.5 2 10 13 15 6.0 2 9 11 13 t rem minimum removal time (clear) 2.0 14 50 65 75 ns 4.5 4 10 13 15 6.0 3 9 11 13 symbol parameter test condition value unit v cc (v) t a = 25c -40 to 85c -55 to 125c min. typ. max. min. max. min. max. c in input capacitance 5.0 5 10 10 10 pf c pd power dissipation capacitance (note 1) 5.0 67 pf symbol parameter test condition value unit v cc (v) t a = 25c -40 to 85c -55 to 125c min. typ. max. min. max. min. max.
m54hc193 8/13 test circuit c l = 50pf or equivalent (includes jig and probe capacitance) r t =z out of pulse generator (typically 50 ? ) waveform 1: propagation delay time, minimum pulse width (count up or down) (f=1mhz; 50% duty cycle)
m54hc193 9/13 waveform 2: propagation delay time, minimum pulse width (clear, load ) (f=1mhz; 50% duty cycle) waveform 3: setup and hold time (a, b, c, d to load ) (f=1mhz; 50% duty cycle)
m54hc193 10/13 waveform 4: minimum removal time (count up or down to clear) (f=1mhz; 50% duty cycle) waveform 5:minimum removal time (count up or down to load ) (f=1mhz; 50% duty cycle)
m54hc193 11/13 dim. mm. inch min. typ max. min. typ. max. a 2.1 2.71 0.083 0.107 a1 3.00 3.70 0.118 0.146 a2 0.63 0.88 1.14 0.025 0.035 0.045 b 1.82 2.39 0.072 0.094 b 0.40 0.45 0.50 0.016 0.018 0.020 b1 0.20 0.254 0.30 0.008 0.010 0.012 d 20.06 20.32 20.58 0.790 0.800 0.810 e 7.36 7.62 7.87 0.290 0.300 0.310 e1 2.54 0.100 e2 17.65 17.78 17.90 0.695 0.700 0.705 e3 7.62 7.87 8.12 0.300 0.310 0.320 f 7.29 7.49 7.70 0.287 0.295 0.303 i 3.83 0.151 k 10.90 12.1 0.429 0.476 l 1.14 1.5 0.045 0.059 dilc-16 mechanical data 0056437f
m54hc193 12/13 dim. mm. inch min. typ max. min. typ. max. a 6.75 6.91 7.06 0.266 0.272 0.278 b 9.76 9.94 10.14 0.384 0.392 0.399 c 1.49 1.95 0.059 0.077 d 0.102 0.127 0.152 0.004 0.005 0.006 e 8.76 8.89 9.01 0.345 0.350 0.355 f 1.27 0.050 g 0.38 0.43 0.48 0.015 0.017 0.019 h 6.0 0.237 l 18.75 22.0 0.738 0.867 m 0.33 0.38 0.43 0.013 0.015 0.017 n 4.31 0.170 fpc-16 mechanical data 0016030e 1 8 16 f g d h a b m c n h 9 e l
m54hc193 13/13 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result f rom its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specificati ons mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectronics. the st logo is a registered trademark of stmicroelectronics all other names are the property of their respective owners ? 2004 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states. http://www.st.com

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